Semiconductor Back-End Process: Package Design and Analysis
In recent years, semiconductor packages have become increasingly complex which has led to a growing emphasis on design. The semiconductor package design process involves various engineers and industry players sharing information about materials, conducting feasibility tests, and optimizing characteristics of the package.
Figure 1 displays the various aspects of semiconductor package design. The design process begins with the department responsible for the chip design providing key information, including the chip pad coordinates, chip layout, and package interconnection data. Then, based on the packaging material, the team designs the structure of the semiconductor package which consists of the substrate and the leadframe. This process involves applying design rules that consider the package’s mass production, manufacturing process, process condition, and required equipment.
The package’s feasibility should be reviewed at the beginning of development and, afterwards, given to chip and product designers for feedback. Once the feasibility study is completed, orders must be placed to system semiconductor manufacturers with design drawings of the package, tools, leadframe, and substrate. While the wafers are being delivered to be packaged, tools, leadframe materials, and substrates on top of design drawings for the connection of wires or solder bumps need to be prepared. For the package process, design drawings for wire or solder bump connections must be shared in advance with package process and manufacturing engineers.
When these design drawings are shared, package design engineers conduct a feasibility test by connecting the package solder ball layout and the chip’s pad sequence to check whether wiring is possible. Through the pre-feasibility phase, the engineers propose the package solder ball arrangement, package size, and specifications to improve the characteristics and process of the semiconductor chip and device.
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